1. Field of the Invention
The present invention relates to a data transmission apparatus and a data transmission method, and more particularly to a data transmission apparatus that analyzes received data on a packet-by-packet basis, and based on the result of the analysis, sets the destination of the data or determines whether or not to transmit the data out, and a data transmission method for use by such a data transmission apparatus, wherein provisions are made so that the processing result of any desired packet processed in the data transmission apparatus can be acquired from outside the apparatus.
2. Description of the Related Art
It is known in the art to transmit data in the form of packets from one data transmission apparatus to another data transmission apparatus. Such a data transmission apparatus may sometimes be called a packet processing apparatus. The data transmission apparatus is equipped with a plurality of input ports (receive ports), and a plurality of processes appropriate to the contents of the packets received via the input ports are successively performed by a plurality of processing blocks provided within the apparatus. When the packets have been processed through the series of processing blocks, the data transmission apparatus transmits the packets out from a plurality of output ports (transmit ports) toward another transmission apparatus (see FIG. 1 in Japanese Unexamined Patent Publication No. 2002-164924).
The packet processing apparatus described in Japanese Unexamined Patent Publication No. 2002-164924 includes, in addition to the processing blocks, a multi-port memory as a processing result storing means in which the packet processing result from each processing block is stored. Each subsequent processing block reads out the packet processing result thus stored in the multi-port memory, and processes the packet by referring to the processing result.
The plurality of processing blocks incorporated in the data transmission apparatus, such as the packet processing apparatus are, for example, a reception processing block, a routing processing block, a filtering processing block, a queuing processing block, and an output processing block. The reception processing block performs processing for reception, and the routing processing block determines the destination of the packet. Further, the filtering processing block determines whether or not the packet should be transmitted out from the apparatus, the queuing processing block checks the transmission priority of the packet, and the output processing block performs processing for output.
In each processing block, statistical information (count value indicating the number of processed packets) and error information (count value indicating the number of error packets) are individually stored in a statistical part or a buffer memory provided within the processing block. In the prior art, when checking the settings of the data transmission apparatus, or when performing debugging to restore from a failure, the information stored in the statistical part or the buffer memory of each processing block is read out and analyzed by an analyzing apparatus provided inside or outside the data transmission apparatus, and the result of the analysis made by the analyzing apparatus is evaluated by the operator from a comprehensive standpoint.
To give a specific example, if there is a discrepancy in packet count value between one processing block and the next processing block in the data transmission apparatus, the operator determines that a packet has been discarded in the upstream block or has been directed to another block for processing.
In recent network products such as routers, as well as network controller LSIs, the variety of required functions has been increasing, and the integration of the increased variety of functions has been proceeding. In the data transmission apparatus as a generally used IP network product, a variety of processing operations are performed, including destination searching, filtering, and priority control, and there are many setup parameters associated with them. The correctness of each setup is verified by referring to the statistical information, error information, etc. available within the data transmission apparatus, but since such information is independently stored in each processing block, there has been the problem that, for any specific packet, it is difficult to trace its processing result.
For example, discarding of a packet, such as earlier described, can occur in any processing block, but the problem has been that it is not possible to know in which block the packet has been discarded, even if a reference is made to the statistical part or the buffer memory provided within each processing block. If only the intended packet data is input to the data transmission apparatus after clearing the counter values in the statistical parts of all the processing blocks, it is possible to verify whether the packet data has been duly processed and output or has been discarded in one of the processing blocks, but this is not a realistic method because such verification cannot be done during the operation of the data transmission apparatus.
Another possible approach to solving the above problem would be to store all the processing data of individual packets in the statistical part or the buffer memory of each processing block or, as in the packet processing apparatus described in Japanese Unexamined Patent Publication No. 2002-164924, to provide a multi-port memory and to store all of the packet processing results from the respective processing blocks into the multi-port memory. However, with these methods, the existing statistical part or buffer memory must be replaced by a large-capacity multi-port memory, or a multi-port memory has to be additionally provided, thus increasing cost.